Static Timing Analysis Engineer - Front End ASIC

This role is to contribute as part of the ASIC integration team to the front-end design activities for ASICs prior to the release to layout. The individual will be responsible for executing synthesis and static timing analysis for various subsystems as part of the ASIC development process. Front-end implementation activities including, - Static timing analysis - Logical equivalence checking - Synthesis - Checking for implementable designs - Developing and maintaining static timing constraints f…

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